Run-time testing of memory locations in a non-volatile memory
US8645776B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2010 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Jul 14, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed for performing run-time tests on a non-volatile memory (“NVM”), such as flash memory. The run-time tests may be tests that are performed on the NVM while the NVM can be operated by an end user (as opposed to during a manufacturing phase). In some embodiments, a controller for the NVM may detect an error event that may be indicative of a systemic failure of a die of the NVM. The controller may then select one or more blocks in the die to test, which may be dies that are currently not being used to store user data. The controller may post process the results of the test to determine whether there is a systemic failure, such as a column failure, and may treat the systemic failure if there is one.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.