Porting a circuit design from a first semiconductor process to a second semiconductor process
US8645878B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2012 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Aug 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/65
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Porting a first integrated circuit design targeted for implementation in a first semiconductor manufacturing process, and implementing a second circuit design in a second semiconductor manufacturing process wherein the electrical performance of the second integrated circuit meets or exceeds the requirements of the first integrated circuit design even if the threshold voltage targets of the second integrated circuit design are different from those of the first integrated circuit design; and wherein physical layouts, and in particular the gate-widths and gate-lengths of the transistors, of the first and second integrated circuit designs are the same or substantially the same. The second integrated circuit design, when fabricated in the second semiconductor manufacturing process and then operated, experiences less off-state transistor leakage current than does the first integrated circuit design, when fabricated in the first semiconductor manufacturing process, and then operated. Porting includes determining processing targets for the second semiconductor manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.