Semiconductor device and method for manufacturing the same
US8648453B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2009 |
| Grant date | Feb 11, 2014 |
| Priority date | — |
| Expiry date | Mar 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a POP type semiconductor device comprising a second semiconductor package as an upper package stacked on a first semiconductor package as a lower package, a plurality of main surface-side lands formed on a first wiring substrate of the first semiconductor package are disposed distributively on both sides of a chip mounting region as a boundary positioned at a central part of a main surface of the first wiring substrate, thus permitting the adoption of a through molding method. Consequently, a first sealing body formed on the main surface of the first wiring substrate in the first semiconductor package as a lower package extends from one second side of the first wiring substrate toward a central part of the other second side of the same substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.