Systems and methods for randomizing component mismatch in an ADC
US8648741B2 · kind B2 · utility
2Cited by
4References
13Claims
0Family size
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Key dates
| Filing date | Nov 7, 2012 |
| Grant date | Feb 11, 2014 |
| Priority date | — |
| Expiry date | Nov 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/74
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuits and methods for converting a signal from analog to digital. A random number generator provides a random number to a memory. The memory is preconfigured to include codes of predetermined digital to analog (DAC) configurations that provide the maximum amount of DAC gradient suppression. At least one Flash reference generation DAC (FRGD) has an input coupled to the memory unit and an output providing a reference voltage level for its respective Flash comparator. The Flash comparators compare the analog input signal to their respective reference voltage and provide a digital output signal based on the comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.