Dynamic voltage and clock scaling control based on running average, variant and trend
US8650423B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2011 |
| Grant date | Feb 11, 2014 |
| Priority date | — |
| Expiry date | Apr 30, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The aspects enable a computing device or microprocessor to scale the frequency and/or voltage of a processor to an optimal value balancing performance and power savings in view of a current processor workload. Busy and/or idle duration statistics are calculated from the processor during execution. The statistics may include a running average busy and/or idle duration or idle/busy ratio, a variance of the running average and a trend of the running average. Current busy or idle durations or an idle-to-busy ratio may be computed based on collected statistics. The current idle-to-busy ratio may be compared to a target idle-to-busy ratio and the frequency/voltage of the processor may be adjusted based on the results of the comparison to drive the current running average toward the target value. The target value of idle-to-busy ratio may be adjusted based on the calculated variance and/or trend values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.