Low-current logic-gate circuit
US8653854B2 · kind B2 · utility
1Cited by
12References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2010 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Jun 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09445
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes E-mode transistors with gate-source junction, a D-mode transistor with gate-source junction. A component generates a voltage drop between the source of the D-mode transistor and the drain of an E mode transistor provided as a signal output. A connection is made between this drain of the E-mode transistor and the gate of the D-mode transistor, and a signal input at the gates of the E-mode transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.