Semiconductor device and driving method thereof
US8654566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2011 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Apr 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device includes a memory cell including a first transistor including a first channel formation region, a first gate electrode, and first source and drain regions; a second transistor including a second channel formation region provided so as to overlap with at least part of either of the first source region or the first drain region, a second source electrode, a second drain electrode electrically connected to the first gate electrode, and a second gate electrode; and an insulating layer provided between the first transistor and the second transistor. In a period during which the second transistor needs in an off state, at least when a positive potential is supplied to the first source region or the first drain region, a negative potential is supplied to the second gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.