Three-dimensional non-volatile memory devices having highly integrated string selection and sense amplifier circuits therein
US8654584B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2011 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Nov 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory devices include an electrically insulating layer on a semiconductor substrate and a NAND-type string of nonvolatile memory cells on an upper surface of the electrically insulating layer. The NAND-type string of nonvolatile memory cells includes a plurality of vertically-stacked nonvolatile memory cell sub-strings disposed at side-by-side locations on the electrically insulating layer. A string selection transistor is provided, which includes a gate electrode extending between the electrically insulating layer and the semiconductor substrate and source and drain regions in the semiconductor substrate. A ground selection transistor is provided, which includes a gate electrode extending between the electrically insulating layer and the semiconductor substrate and source and drain regions in the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.