Apparatus and method for testing semiconductor integrated circuits, and a non-transitory computer-readable medium having a semiconductor integrated circuit testing program
US8656232B2 · kind B2 · utility
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10Claims
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Key dates
| Filing date | Feb 2, 2011 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Aug 23, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for testing a semiconductor integrated circuit includes a pattern data generating unit configured to generate test pattern data for testing a write operation in a memory of the semiconductor integrated circuit; and a write unit configured to write the test pattern data into a storage area of the semiconductor integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.