Semiconductor device
US8659073B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 21, 2012 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Jul 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
Abstract
An ESD protection element is disclosed in which LOCOS oxide films are formed at both ends of a gate electrode, and a conductivity type of a diffusion layer formed below one of the LOCOS oxide films which is not located on a drain side is set to a p-type, to thereby limit an amount of a current flowing in a portion below a source-side n-type high concentration diffusion layer, the current being generated due to surface breakdown of a drain. With this structure, even in a case of protecting a high withstanding voltage element, it is possible to maintain an off-state during a steady state, while operating, upon application of a surge or noise to a semiconductor device, so as not to reach a breakage of an internal element, discharging a generated large current, and then returning to the off-state again.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.