Metal film surface mount fuse
US8659384B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2010 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Apr 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01H2085/0414
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A chip fuse includes a plurality of parallel fusible link layers disposed between a corresponding plurality of insulating glass layers deposited on a substrate and laminated together. The fusible link layers are interconnected between the glass layers without the need for vias. A first of the plurality of fusible link layers extends beyond a cover disposed over the chip fuse and one of the glass layers to form a first electrical terminal connection. Another of the plurality of the fusible link layers also extends beyond the cover and another of the glass layers to form a second electrical terminal connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.