Digital radio frequency memory utilizing time interleaved analog to digital converters and time interleaved digital to analog converters
US8659453B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2011 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Jul 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/662
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital radio frequency memory (DRFM) comprises a plurality of time interleaved analog to digital converters (ADCs) in cooperation with a plurality of time interleaved digital to analog converters (DACs) to provide an effective sampling rate which may be greater than the clock rate of the system. A higher sampling rate at the ADC increases instantaneous bandwidth, while a higher sampling rate at the DAC improves spectral purity. The ADCs and DACs are time interleaved by supplying a clock signal to each ADC/DAC which is skewed with respect to the previous and subsequent skewed signal. In order to process the higher effective sampling rate, a pre-computation of DAC values for each high rate sample is performed by an SDAC algorithm that pipelines the calculations of the processed sample values provided to the DAC. A DAC bias correction is provided to adjust for drift in the DACs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.