Register state saving and restoring
US8661232B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2010 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Nov 13, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing apparatus 1 having registers 6, when a state saving trigger event occurs while a result value of a data processing operation is still to be written to a destination register then saving and restoring control circuitry 12 selects a state saving sequence defining a temporal order for saving register values to a backup data store 10. The sequence is selected to provide the destination register with a position within the sequence corresponding to a time after the result value has been written to the destination register. The register values are then saved to the backup data store 10 in the order of the selected state saving sequence. A similar technique can be used when a state restoring trigger event triggers loading of the data values from the backup data store 10 to the registers 6.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.