Systems and methods of designing integrated circuits
US8661389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2011 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Jul 27, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of designing an integrated circuit includes providing a cell library including a first and second cell structures. The cell structures each include a dummy gate electrode disposed on a boundary. An edge gate electrode is disposed adjacent to the dummy gate electrode. An oxide definition (OD) region has an edge disposed between the edge gate electrode and the dummy gate electrode. The method includes determining if the cell structures are to be abutted with each other. If so, the method includes abutting the cell structures. If not so, the method includes increasing areas of portions of the OD regions between the edge gate electrodes and the dummy gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.