Frequency synthesizer for generating a low noise and low jitter timebase of a reference signal
US8664980B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2012 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Nov 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/68
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer for generating a low noise and low jitter timebase of a reference signal generates first and second output signals a difference frequency that is low enough for use in sub-scanning is implemented with a first incrementer, having a preset increment and a preset end value E1 controlling a first fractional divider and a second incrementer having a preset increment and a present end value E2 controlling a second fractional divider, wherein each of the incrementers is clocked from the output signal of each fractional divider so that, when the end value E1, E2 is reached, an end signal is output and the incrementers are reset to a carryover value as a new starting value and the end signal is switched between the division factors of the fractional dividers so that the switching sequence of the end signal is periodic with the output signals of the fractional dividers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.