Phase interpolator, multi-phase interpolation device, interpolated clock generating method and multi-phase clock generating method
US8664993B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 5, 2012 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00052
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator, multi-phase interpolation device, interpolated clock generating method and multi-phase clock generating method is related to a phase interpolator with a differential to single-ended converter, a load circuit, two differential pairs, a current source and at least a switch pair. By using the switch pair to control the current providing for the two differential pairs from the current source, and through regulating the load of the load circuit and/or the reference current of the current source, the intersection of a first signal and a second signal is in the overlap duration between a first input clock and a second input clock, so that uniform multi-phase output clock signal can be interpolated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.