Integrated circuit and method for controlling load on the output from on-chip voltage generation circuitry
US8665009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2012 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Jul 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit and method are provided for controlling variation in the voltage output from on-chip voltage generation circuitry. The integrated circuit comprises voltage generation circuitry configured to operate from a supplied input voltage and to generate at an output node an on-chip voltage supply different to the supplied input voltage. A circuit block is then arranged to receive the on-chip voltage supply generated by the voltage generation circuitry, during operation of the circuit block the circuit block presenting a varying load on the output node. Oscillation circuitry is also coupled to the output node to provide an additional load on the output node, and is configured to produce an oscillation signal whose frequency varies as the value of the on-chip voltage supply varies. Control circuitry is configured to be responsive to a trigger condition to adjust the additional load provided on the output node by the oscillation circuitry. This provides a particularly simple and effective mechanism for providing an additional load on the output node which can be altered with the aim of offsetting variation in the load on the output node presented by the circuit block, thu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.