Diode having a pocket implant blocked and circuits and methods employing same
US8665570B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2011 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Diodes, including gated diodes and shallow trench isolation (STI) diodes, manufacturing methods, and related circuits are provided without at least one halo or pocket implant thereby reducing capacitance of the diode. In this manner, the diode may be used in circuits and other devices having performance sensitive to load capacitance while still obtaining the performance characteristics of the diode. Such characteristics for a gated diode include fast turn-on times and high conductance, making the gated diodes well-suited for electro-static discharge (ESD) protection circuits as one example. Diodes include a semiconductor substrate having a well region and insulating layer thereupon. A gate electrode is formed over the insulating layer. Anode and cathode regions are provided in the well region. A P-N junction is formed. At least one pocket implant is blocked in the diode to reduce capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.