Apparatus and method for integrated circuit protection
US8665571B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2011 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Feb 20, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/207
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods for integrated circuit protection are provided. In one embodiment, an integrated circuit (IC) includes a first pad, a second pad, a third pad, a first protection subcircuit coupled between the first pad and a common node, a second protection subcircuit coupled between the second pad and the common node, and a third protection subcircuit coupled between the third pad and the common node. The first, second, and third protection subcircuits each include one or more building blocks for maintaining the voltage of each of the pads within a predefined safe range, as well as to maintain the voltage between each of the pads within acceptable limits. A portion of the building blocks used to provide transient signal protection can be shared between pads, thereby reducing the area of the pad protection circuit relative to a scheme using a separate stack of building blocks for each pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.