Method and device for deterministic timing acquiring and tracking
US8665929B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2011 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Jul 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0079
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Assuring acquisition of symbol timing in a full-duplex data transceiver under inter-symbol interference conditions. One embodiment includes a transmitter comprising a first local clock having a first free running frequency, and a receiver comprising a second local clock having a second frequency initially set to a value higher than the first free running frequency. A first type decision-directed timing recovery mechanism is intentionally limited to only decreasing the frequency of the second local clock. A second type decision-directed timing recovery mechanism is not limited to only decreasing the frequency. The receiver receives symbols, decrease the frequency of the second local clock to a third frequency value using the first type decision-directed timing recovery mechanism, disables the first type mechanism after reaching the third frequency, and then phase-lock the second local clock to the optimal phase under MMSE criteria using the second type decision-directed timing recovery mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.