Method and device for video-stream frame rate adaptation, and field programmable gate array chip and video stream processing apparatus
US8665947B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 2009 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Oct 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/587
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This invention provides a method and device for video-stream frame rate adaptation. The method includes: allocating a buffer space for each of at least one video conference room respectively and dividing the buffer space into at least one segment, each segment of which is used for buffering a video frame; and performing following steps for each of the at least one video conference room: generating a pulse signal for the video conference room periodically according to a certain pulse rate; and performing a data writing operation for a segment of the corresponding buffer space at an input-video-stream frame rate of the video conference room, and performing a reading operation for a segment of the buffer space at an output-video-stream frame rate. This invention also provides an FPGA chip and a video stream processing apparatus. The invention simplifies frame rate adaptation design, and reduces system processing overhead during the frame rate adaptation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.