Deadlock resolution in end-to-end credit protocol
US8667205B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2012 |
| Grant date | Mar 4, 2014 |
| Priority date | — |
| Expiry date | Aug 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/39
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system for deadlock resolution in end-to-end credit protocol includes a plurality of source controllers configured to receive data frames on an incoming link, wherein each source controller includes a plurality of credit counters. The system also includes a plurality of end controllers configured to receive data frames from the plurality of source controllers, wherein each end controller includes a buffer credit counter, a plurality of request counters, and an output buffer. Each of the plurality of credit counters corresponds to one of the plurality of end controllers and stores a number of credits received from that end controller. The buffer credit counter of each end controller stores a number of available credits of the end controllers. Each of the request counters corresponds to one of the plurality of source controllers and stores a number of credit requests received from that source controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.