Programmable pulse generator using inverter chain
US8669784B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 16, 2012 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Apr 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/05
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a method includes generating a first signal based on a clock signal and generating a second signal based on a programmable delayed clock signal. The method then generates a reset signal based on the first signal and the second signal. The clock signal is delayed using an inverter chain to generate a delayed version of the clock signal. An output signal is generated based on the delayed version of the clock signal and the reset signal. When a pulse width of the output signal is greater than a data duration determined from the clock signal, the pulse width of the output signal is reset to the pulse width of the data duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.