Mechanism for advanced server machine check recovery and associated system software enhancements
US8671309B2 · kind B2 · utility
11Cited by
5References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 1, 2011 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Apr 23, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1088
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of a hardware processor including a plurality of machine state registers (MSRs) are described. At least one of the MSRs includes an erroring logical processing (ELP) bit which when set, indicates that a particular thread executing on the hardware processor caused an error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.