Display apparatus
US8674923B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 7, 2013 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Jan 7, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There is a need for decreasing a variation in times for writing to TFT elements for pixels in a direction along the extension of a gate line in a liquid crystal display apparatus. A display apparatus includes a display panel having multiple gate lines and drain lines arranged in a matrix and a data driver for outputting a display data signal to each drain line. The data driver includes: an internal control signal generation circuit generating an internal control signal for setting a timing to output a data signal to a drain line of each block on a block basis by dividing the plurality of drain lines into multiple blocks; and a register circuit for recording a setting for division of the block, a setting for delay direction and width of a timing to output the data signal, and a setting for rising and falling of an internal control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.