System for embedded video test pattern generation
US8675076B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2010 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Feb 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N17/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In accordance with some embodiments of the invention, a video processing circuit can include a synchronization generator to generate a clock signal from an input video stream; and a test pattern generator coupled to receive the clock signal provided by the synchronization generator and to generate a test pattern over a number of cycles. In accordance with some embodiments of the present invention, a video processing system may include an video input capture circuit; a video input processing circuit including a synchronization generator and a test pattern generator; a video scaling circuit; a video merging circuit to recombine the video signals provided by the video scaling circuit into one video signal; and a video output circuit including a cyclical redundancy check circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.