Method of manufacturing a package
US8675323B2 · kind B2 · utility
3Cited by
7References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2012 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Apr 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
Provided is an ESD protection circuit for CDM capable of preventing a high current from flowing and preventing breakage when a battery is connected with reverse polarity. The ESD protection circuit employs a circuit configuration in which transistor elements are interposed in series to OFF transistors (11 and 13) included in the ESD protection circuit for CDM so that parasitic diodes of the transistor elements are connected to parasitic diodes of the OFF transistors in a reverse direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.