Memory write assist
US8675418B2 · kind B2 · utility
5Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2010 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Sep 8, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes a memory cell, two word lines coupled to the memory cell, two bit lines coupled to the memory cell, and a write assist cell. The write assist cell is configured to transfer data of one bit line in a write operation to the other bit line in a read operation when one word line is used for the write operation, the other word line is used for the read operation, and the two word lines are asserted simultaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.