Switch failover control in a multiprocessor computer system

US8677180B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Gerd Bayer · Stuttgart, DE
• David F. Craddock · New Paltz, US
• Thomas A. Gregg · Highland, US
• Michael Jung · Frankfurt am Main, DE
• Andreas Kohler · Hamburg, DE
• Elke G. Nass · Ehningen, DE
• Oliver G. Schlag · Holzgerlingen, DE
• Peter K. Szwed · Kingston, US

Key dates

• Filing date: Jun 23, 2010
• Grant date: Mar 18, 2014
• Expiry date: Mar 3, 2031

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F11/2038
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A system and a method for failover control comprising: maintaining a primary device table entry (DTE) in a first table activated for a first adapter in communication with a first processor node having a first root complex via a first switch assembly and maintaining a secondary DTE in standby for a second adapter in communication with a second processor node having a second root complex via a second switch assembly; maintaining a primary DTE in a second table activated for the second adapter and maintaining a secondary DTE in standby for the first adapter; and upon a failover, updating the secondary DTE in the first table as an active entry for the second adapter and forming a path to enable traffic to route from the second adapter through the second switch assembly over to the first switch assembly and up to the first root complex of the first processor node.