Semiconductor devices having stacked structures and a layer formed thereon tapered in direction opposite of a tapering of the stacked structures and methods of fabricating the same
US8679920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2011 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Dec 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
Semiconductor devices and methods of fabricating semiconductor devices that may include forming an insulation structure including insulation patterns that are sequentially stacked and vertically separated from each other to provide gap regions between the insulation patterns, forming a first conductive layer filling the gap regions and covering two opposite sidewalls of the insulation structure, and forming a second conductive layer covering the first conductive layer. A thickness of the second conductive layer covering an upper sidewall of the insulation structure is greater than a thickness of the second conductive layer covering a lower sidewall of the insulation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.