Multiplier circuit with improved wide band tripled wave output
US8680898B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 9, 2012 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Feb 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiplier circuit including; a 90 degrees coupler that divides an input signal into a first input signal and a second input signal of which phase difference of a base wave is 90 degrees; a first transistor that receives the first input signal and outputs a first output signal including at least a doubled wave and a tripled wave of the first input signal; a second transistor that receives the second input signal and outputs a second output signal including at least a doubled wave and a tripled wave of the second input signal; and a combiner that restrains leakage of the first output signal or the second output signal from one of the first transistor and the second transistor to the other, combines the first output signal and the second output signal, and outputs an output signal of the tripled wave.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.