Out of order millicode control operation
US8683261B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2011 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Feb 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3863
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Instructions within a processor are managed by receiving, at a recovery unit of the processor, an instruction that modifies a control register residing within the recovery unit. The recovery unit receives a first set of data associated with the instruction from a general register. A second set of data associated with the instruction is retrieved from the control register by the recovery unit. The recovery unit performs at least one binary logic operation on the first set of data and the second data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.