Semiconductor device
US8683278B2 · kind B2 · utility
2Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Apr 24, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318588
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device, comprising: a user circuit having a plurality of flip-flops; and a connection path which, while in test mode, connects the plurality of flip-flops and forms a scan chain, wherein the connection path has a logic operation circuit which performs a logic operation on a non-inverted output value of any flip-flop among the plurality of flip-flops and outputs the result, or, an inverted value connection path which outputs to a following-stage flip-flop an inverted output value of any flip-flop among the plurality of flip-flops.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.