Semiconductor devices and methods of manufacturing the same
US8686485B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2013 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Feb 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A semiconductor device may include active patterns of pillar-shapes disposed on a substrate and spaced apart from each other in one direction; a gate electrode extending in the one direction and overlapped with sidewalls of the active patterns; a gate insulating layer disposed between the gate electrode and the active patterns; bit lines connected to bottom surfaces of respective active patterns; and/or capacitors connected to top surfaces of the respective active patterns. Each of the active patterns may have no p-type/n-type (PN) junctions. A semiconductor device may include a substrate; active patterns on the substrate that are spaced apart from each other; a gate electrode configured to overlap sidewalls of the active patterns; and/or gate insulating layers between the gate electrode and respective active patterns. The active patterns may be doped with dopants of a same conductivity type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.