Low-current logic plus driver circuit
US8686752B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2012 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Jun 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0952
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes a logic stage, an inverter stage, and a driver stage. The logic stage and the inverter stage are provided with current limiters, which include a D-mode feedback transistor and a component that generates a voltage drop. A feedback loop connects the source and the gate of the D-mode feedback transistor via this component. The driver stage includes E-mode transistors connected in a totem pole that drive a D-mode transistor and an E-mode transistor to connect and disconnect the load circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.