Methods and circuits for enabling slew rate programmability and compensation of input/output circuits
US8686777B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2013 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Jan 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/131
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments of circuits and methods for enabling a slew rate programmability and compensation of input/output circuits are provided. The circuit includes a delay code generation circuit and at least one input/output (I/O) circuit. The delay code generation circuit is configured to receive a clock signal and a delay factor and generate a compensated delay code based on the clock signal or a combination of the delay factor and the clock signal. The I/O circuit includes a plurality of delay lines associated, integrated or communicatively associated with the delay code generation circuit and is configured to program the plurality of delay lines so as to generate a predetermined delay corresponding to the compensated delay code in order to achieve a predetermined slew rate of the I/O circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.