Testing of digital to analog converters in serial interfaces
US8686884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2012 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Aug 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for testing digital to analog converters (DAC) in a serial interface having a comparator to receive an input signal and a local offset signal is disclosed. A first DAC selectably provides one of a global offset to the input signal during a normal mode of operation and a first test signal to the comparator during a test mode of operation. A second DAC selectably provides one of the local offset signals to the comparator during the normal mode of operation and a second test signal to the comparator during the test mode of operation. A test module may cause the first DAC to determine a first test signal to provide to the local offset input of the comparator and may cause the second DAC to incrementally change a test signal provided to the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.