Patent · US Active

Semiconductor storage apparatus and semiconductor integrated circuit

US8687454B2 · kind B2 · utility

4Cited by
2References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 11, 2012
Grant dateApr 1, 2014
Priority date
Expiry dateOct 9, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/10
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In a semiconductor storage apparatus, an internal address generation unit generates, when receiving successive first and second external addresses, from the second external address an internal address for selecting any of the memory cells connected to bit lines and word lines except the bit line and word line connected to a memory cell to be selected according to the first external address. When receiving the successive external addresses, a memory cell connected to the same bit line and word line is not continuously selected, and erroneous readout due to rewriting of a value of the memory cell in a non-selected state is suppressed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.