Method and system for split voltage domain transmitter circuits
US8687981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2008 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Jul 4, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/4242
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Methods and systems for split voltage domain transmitter circuits are disclosed and may include amplifying a received signal in a plurality of partial voltage domains. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. A sum of the plurality of partial domains may be equal to a supply voltage of the integrated circuit. A series of diodes may be driven in differential mode via the amplified signals. An optical signal may be modulated via the diodes, which may be integrated in a Mach-Zehnder or a ring modulator. The amplified signals may be communicated to the diodes, connected in a distributed configuration, via even-mode coupled transmission lines. The partial voltage domains may be generated via stacked source follower or emitter follower circuits. The voltage domain boundary value may be at one half the supply voltage due to symmetric stacked circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.