Management of partial data segments in dual cache systems
US8688913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2011 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Feb 24, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/283
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
For movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor, a whole data segment containing one of the partial data segments is promoted to both the lower and higher levels of cache. Requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache. Unrequested data of the whole data segment is split and positioned at a Least Recently Used (LRU) portion of the demotion queue of the higher level of cache. The unrequested data is pinned in place until a write of the whole data segment to the lower level of cache completes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.