Patent · US Active

Method and apparatus to reduce idle link power in a platform

US8689028B2 · kind B2 · utility

14Cited by

2References

18Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Paul S. Diefenbaugh · Portland, US
Robert E. Gough · Cornelius, US
Yuval Bachrach · Haifa, IL
Mikal C. Hunsaker · Cameron Park, US
Rafi Ben-Tal · Yoqneam Illit, IL
Ilan Pardo · Ramat HaSharon, IL
Gideon Prat · Haifa, IL
David J. Harriman · Sacramento, US

Key dates

Filing date	Jul 1, 2011
Grant date	Apr 1, 2014
Priority date	—
Expiry date	May 3, 2032

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.