Transmitter employing pulling mitigation mechanism and related method thereof
US8692578B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2012 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Aug 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7206
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transmitter includes a power amplifier (PA) and a direct current (DC) voltage tuning circuit. The PA is arranged for receiving a radio-frequency (RF) clock derived from a clock source, and producing an output signal according to at least the RF clock. The DC voltage tuning circuit is arranged for tuning at least one DC voltage supplied to the PA for pulling mitigation of the clock source. A method of pulling mitigation of a source clock by a power amplifier (PA) includes adjusting a direct current (DC) voltage supplied to the PA.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.