Data interface clock generation
US8692699B2 · kind B2 · utility
1Cited by
1References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 10, 2012 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an apparatus may include a clock generator to generate a format clock signal. The apparatus may also include a serializer to generate serial data based on a transmit clock signal and parallel input data. The apparatus may also include a signal generator to generate at least two differential signals based on the format clock signal and the serial data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.