Patent · US Active

Graphics processor with non-blocking concurrent architecture

US8692834B2 · kind B2 · utility

4Cited by
25References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 6, 2012
Grant dateApr 8, 2014
Priority date
Expiry dateSep 24, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T2200/28
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing workloads, and in a specific example, ray tracing workloads. The workloads include a scheduling key, which is one basis on which the groupings can be formed. Workloads grouped together can all execute from the same source of instructions, one or more different private data elements. Such workloads can recursively instantiate other workloads that reference the same private data elements. In some examples, the scheduling key can be used to identify a data element to be used by all the workloads of a grouping. Memory conflicts to private data elements are handled through scheduling of non-conflicted workloads or specific instructions an deferring conflicted workloads instead of locking memory locations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.