Patent · US Active

Methods and systems for CMOS implementation of neuron synapse

US8694452B2 · kind B2 · utility

14Cited by
4References
21Claims
0Family size

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Inventors

Key dates

Filing dateJul 7, 2010
Grant dateApr 8, 2014
Priority date—
Expiry dateJun 21, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/54
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Certain embodiments of the present disclosure support techniques for power efficient implementation of neuron synapses with positive and/or negative synaptic weights.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.