Patent · US Active

Conversion of a two-wire bus into a single-wire bus

US8694710B2 · kind B2 · utility

11Cited by
8References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 25, 2011
Grant dateApr 8, 2014
Priority date
Expiry dateJan 18, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4295
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.