Patent · US Active

Method and system for NAND flash support in an autonomously loaded secure reprogrammable system

US8694767B2 · kind B2 · utility

4Cited by
3References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 26, 2013
Grant dateApr 8, 2014
Priority date
Expiry dateFeb 26, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/572
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system and method that enables secure system boot up with a restricted central processing unit (CPU). The system includes a memory, a segmenting device, and a security sub-system. The memory is a NAND flash memory with a block structure that comprises a guaranteed block and non-guaranteed blocks. The guaranteed block is guaranteed to be useable. A boot code is segmented into boot code segments and the boot code segments are stored separately in the guaranteed and non-guaranteed blocks. The security sub-system is configured to locate the boot code segments stored in the non-guaranteed blocks and validate them independently based on data in the guaranteed block. The security sub-system is further configured to assemble the boot code segments into the boot code and execute the boot code.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.