Memory device with adaptive capacity
US8694859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2012 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Jul 2, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for data storage in a memory that includes a plurality of analog memory cells includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.