Method of manufacturing a semiconductor device which includes forming a silicon layer without void and cutting on a silicon monolayer
US8697519B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
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Key dates
| Filing date | Aug 6, 2012 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Aug 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/689
Abstract
Methods of manufacturing a semiconductor device are provided. Patterns having a recess region defined therebetween are formed on a substrate, and then a silicon precursor having an organic ligand is provided on the substrate to absorb silicon on sidewalls and a bottom surface of the recess region to form a silicon monolayer on the patterns having the recess region defined therebetween. A silicon layer without void and cutting is formed on the silicon monolayer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.