Apparatus for improving performance of field programmable gate arrays and associated methods
US8698516B2 · kind B2 · utility
2Cited by
5References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 19, 2011 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | Feb 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17792
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field programmable gate array (FPGA) includes a set of monitor circuits adapted to provide indications of process, voltage, and temperature for at least one circuit in the FPGA, and a controller adapted to derive a range of body-bias values for the at least one circuit from the indications of process, voltage, and temperature for the at least one circuit. The FPGA further includes a body-bias generator adapted to provide a body-bias signal to at least one transistor in the at least one circuit. The body-bias signal has a value within the range of body-bias values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.